The Open Compute Project's 2026 APAC Summit put a run of open-standard work at the AI data center's power and interconnect layers into the spotlight, led by an 800 VDC power alignment among Google, Microsoft and NVIDIA.
In Taipei, the Open Compute Project (OCP) held its 2026 APAC Summit at TaiNEX2 on August 11 and 12, under the theme "Leading the Future of AI." The event served as a backdrop for a series of announcements aimed at standardizing how AI data centers distribute power and connect accelerators.
Google, Microsoft and NVIDIA align on 800 VDC power
In a blog post dated August 11, OCP detailed a collaboration among Google, Microsoft and NVIDIA to standardize a low-voltage DC (LVDC) 800 VDC power architecture for AI data centers. The effort is anchored on OCP's existing rack-power work and a new LVDC Solid-State Transformer specification (v0.3, published July 2026), following a joint white paper in March 2026. OCP states that more than 80 equipment and infrastructure manufacturers are building to the specification. The stated rationale is that higher-voltage DC distribution moves more power with less copper as racks scale from roughly 100 kW toward 1 MW and beyond. (OCP) (NVIDIA)
The Diablo 400 rack-power specification advances
The power push builds on OCP's Diablo 400 specification (v0.7.0), which defines a disaggregated "sidecar" power rack and permits either ±400 VDC bipolar or 800 VDC nominal distribution, supporting IT racks from 100 kW to 1 MW. NVIDIA is separately pursuing a monopolar 800 V reference design in the roughly 660 kW class that runs alongside, but is not identical to, the OCP specification. (OCP spec) (Data Center Dynamics)
Credo contributes an open scale-in interconnect
On August 10, Credo said it would contribute its OmniConnect scale-in interconnect technology to the OCP community, positioning it as an open approach to the memory-wall and accelerator-to-accelerator connectivity problem. (Yahoo Finance)
First OCP High Bandwidth Flash specification debuts at FMS 2026
Separately from the APAC Summit, and at the Flash Memory Summit on August 3, Sandisk and SK hynix released the first OCP technical specification for High Bandwidth Flash (HBF). It defines 8-high and 16-high NAND stack configurations of up to 512 GB per stack, three bandwidth grades spanning roughly 0.4 to 3.0 TB/s, and adopts UCIe as the chiplet interconnect linking flash to CPUs and GPUs. The specification targets the inference "memory wall," offering HBM-class bandwidth at higher capacity per bit. (SK hynix)
What's next
OCP's attention now turns to its Global Summit in San Jose, scheduled for October 12–15, 2026. (DDC Solutions)